Adeia’s wafer-to-wafer and die-to-wafer/die-to-die hybrid bonding solutions address the industry’s demand for higher interconnect densities, while delivering multiple benefits.
DBI® solutions from Adeia enable chips from different nodes, functions, and manufacturers to be heterogeneously assembled while operating with the seamless integration and performance of a monolithic design, giving system engineers greater creative freedom to customize and optimize their solutions.
The technology behind DBI® solutions enables chip and wafer stacking with ultra-fine pitch interconnects below one micron - vastly smaller than the ~35-micron limit of traditional micro-bump methods. This breakthrough is leading to smaller, more functional smartphones, digital cameras, tablets, and AR/VR devices. NAND manufacturers are increasingly leveraging DBI® technology to develop 3D NAND architectures to significantly boost memory performance and reduce power consumption in advanced memory applications. This low-inductance, energy-efficient interconnect meets the growing AI bandwidth requirements for high-performance compute applications
Adeia’s DBI® hybrid bonding technology delivers up to 10,000 times higher interconnect density per area compared to conventional micro-bump technology, significantly boosting chip connectivity. The ultra-fine interconnect lowers inductance, capacitance, and resistance to enhance overall performance and power efficiency. In 2.5D, 3D, and 3.5D hybrid bonded applications, stacking memory to logic or logic to logic reduces the distance data travels and enables faster signal transmission with lower latency and lower power.
Compared to traditional micro-bump methods, DBI® hybrid bonding reduces 11 production steps in 3D stacking while improving manufacturing yields and consuming less energy. The room temperature bonding process eliminates the need for bumping and underfill, streamlines production, and improves logistics. The result is a simpler, more reliable, efficient, and cost-effective manufacturing process.
DBI® technology accelerates advancements in next-generation semiconductor packaging by pushing the boundaries of miniaturization. By reducing device footprint and thickness, DBI® reduces chip to chip spacing with improved interconnect density, enabling high-density packaging. This supports more compact, vertically stacked designs that meet the growing demands for enhanced performance and advance miniaturization in future semiconductor applications.
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