Direct Bond Interconnect DBI®

Adeia’s Wafer-to-Wafer Hybrid Bonding 

Our DBI® wafer-to-wafer hybrid bonding platform creates strong bonds between both dielectric and metal surfaces to form a scalable electrical interconnect to ultra-fine, sub-micron pitches. It reduces the need for Through-Silicon Vias (TSVs) and eliminates the need for under-bump metal and underfill while boosting bonding throughput. This innovative approach also enhances electrical, thermal, and mechanical performance.

DBI® Wafer-to-Wafer Process Flow

With existing production lines, DBI® Wafer-to-Wafer hybrid bonding has proven to be cost-effective, versatile, and compatible with a range of industry standards in semiconductor wafer dielectrics, including silicon oxide (SiO2) and silicon oxy-nitride-carbide (SiOxNyCz). It is even compatible with wafers that have different coefficients of thermal expansion (CTEs) like silicon (Si), aluminum oxide (Al2O3), glass, gallium arsenide (GaAs), and indium phosphide (InP) for heterogeneous integration.

Wafer

Metal bond pads are created with a BEOL process

CMP

Wafer surface is planarized and polished to achieve smooth surfaces with a minimal Cu recess

ACTIVATION

Plasma-based chemical activation prepares the surface for sopntaneous bonding

ACTIVATION

Plasma-based chemical activation prepares the surface for sopntaneous bonding

ROOM TEMP BONDING

Prepared wafers are precisely aligned then placed together

Wafers sopntaneously bond at room temperature and pressure, forming strong chemical bonds in seconds

LOW TEMP BATCH ANNEAL

Plasma-based chemical activation prepares the surface for sopntaneous bonding

DBI® Wafer-to-Wafer Product Application Briefs

Low-Temperature Wafer Bonding and Fine Pitch 3D Interconnect

High Density Low-Cost Stacked 3D NAND with Hybrid Bonding

Pixel-Level 3D Integration for Advanced Stacked CMOS Image Sensors

3D Integration for MEMS Devices

Low-Temperature Wafer Bonding and3D Interconnect for RF Devices